ヤマウチ　ヒロシ   Yamauchi Hiroshi   山内　博    所属   千葉工業大学  工学部 宇宙・半導体工学科    職種   准教授
言語種別	英語
発行・発表の年月	2015/02
形態種別	学術雑誌
査読	査読あり
標題	Fabrication of Step-Edge Vertical Channel Organic Transistors by Selective Electro-Spray Deposition
執筆形態	共著
掲載誌名	IEICE Trans. Electron.
掲載区分	国内
出版社・発行元	IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
巻・号・頁	E98C(2),pp.80-85
著者・共著者	H. Yamauchi,S. Kuniyoshi,M. Sakai,K. Kudo
概要	Step-edge vertical channel organic field-effect transistors (SVC-OFETs) with a very short channel have been fabricated by a novel selective electrospray deposition (SESD) method. We propose the SESD method for the fabrication of SVC-OFETs based on a 6,13-bis(triisopropyl-silylethynyl) pentacene (TIPS-pentacene) semiconductor layer formed by SESD. In the SESD method, an electric field is applied between the nozzle and selective patterned electrodes on a substrate. We demonstrated that the solution accumulates on the selected electrode pattern by controlling the voltage applied to the electrode.
DOI	10.1587/transele.E98.C.80
ISSN	1745-1353