ヤマウチ　ヒロシ   Yamauchi Hiroshi   山内　博    所属   千葉工業大学  工学部 宇宙・半導体工学科    職種   准教授
言語種別	英語
発行・発表の年月	2013/12/31
形態種別	学術雑誌
査読	査読あり
標題	Fabrication of n- and p-channel transistors by electrospray deposition
執筆形態	共著
掲載誌名	Jpn. J. Appl. Phys.
掲載区分	国内
出版社・発行元	IOP PUBLISHING LTD
巻・号・頁	53(1)
著者・共著者	H. Yamauchi,M. Sakai,S. Kuniyoshi,and K. Kudo
概要	Step-edge vertical-channel organic field-effect transistors (SVC-OFETs) with a very short channel have been fabricated by a novel electrospray deposition (ESD) method. ESD is the direct patterning process in which a solution is sprayed by using an electric field between the nozzle and electrodes formed on samples. The electrosprayed solution accumulates on the electrode pattern, and SVC-FETs based on 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-pentacene) and a ZnO layer formed by ESD showed typical p- and n-channel FET characteristics, respectively. The results demonstrate that this ESD direct wet patterning is a useful method for complementary inverters and integrated circuit applications. (C) 2014 The Japan Society of Applied Physics
DOI	10.7567/JJAP.53.01AB16
ISSN	0021-4922/1347-4065